WORK / PUBLIC ENGINEERING LEDGER
Records, not project cards.
Every public item carries a disclosure state. Employer-confidential and patent-sensitive programmes are absent, not teased.
7 public records
IDDisclosureRecordDomainState
W-01FULLLayer-2 Ethernet security firewall in hardwareRTL · Zynq-7000Complete →
W-02RESTRICTEDEthernet packet processing on AMD Kria KR260AXI4 · PS/PLComplete →
W-03FULLAXI4 master protocol verification environmentUVM · AXI4Simulated →
W-04FULLAXI4-Lite 8-bit LFSR custom IPRTL · AXI4-LiteHardware-validated
W-05FULLFIR filter PPA characterisation studyCadence Genus · 90 nmSynthesised
W-06FULLSchottky diode TCAD studyDevice studyStudy
W-07REDUCEDTechnical knowledge and documentation architectureTechnical governanceImplemented →
WITHHELD REGISTER
Some work is deliberately not on this page.
Current-employer architectures, unfiled patent candidates, internal programmes, partner details, budgets and unpublished measurements are excluded from the public site. Their absence is intentional.