Hardware validated · M.E. thesis
Layer-2 Ethernet security firewall
Moving Ethernet security policy into programmable logic, with a compact rule engine and bounded evaluation latency.
Explore projectHardware architecture · Engineering leadership
Sundaram S SHardware
architecture.
I’m Sundaram S S, a hardware architecture and VLSI engineer based in Coimbatore, India. I work across Verilog and SystemVerilog RTL, FPGA design, SoC integration and hardware security, alongside engineering leadership, technology strategy and delivery.
Coimbatore, India · Open to meaningful conversations
Architecture
to execution.
to execution.
Sundaram S SEngineering & technical leadership
Engineer. Architect. Technical leader.
Find your way in
Different reasons to visit.
The same person to meet.
Start with what matters to you.
For recruiters & engineering teamsSee how I think.
See how I think.
Then see what I’ve built.
Explore my hands-on engineering work, technical leadership and programme responsibilities alongside my education and industry experience. I welcome roles that combine technical depth with ownership and delivery.
Selected work
Projects &
engineering contributions.
Industry internship · Aviat Networks
Ethernet processing on Kria KR260
An industry internship exploring VLAN switching on a Zynq UltraScale+ SoC platform.
Explore projectProfessional capabilities
Engineering depth.
Leadership in delivery.
My work spans design and implementation, with responsibility for technical direction, teams and execution.
Explore my capabilities01
Architecture & integration
Turning requirements into subsystem boundaries, interface contracts, datapaths, and practical design trade-offs.
02
RTL & FPGA development
Describing hardware, building reusable blocks, and connecting designs to real FPGA platforms.
03
Engineering leadership & delivery
Coordinating people, technical decisions and execution so engineering work progresses with clear priorities and accountability.
04
Technical strategy & product planning
Connecting engineering feasibility, reusable IP and product priorities to a practical technology roadmap.
Writing & research
Research &
published work.
2026Conference paper
2025Conference chapter
Springer · Smart System for Integrated Computing and Communication
Enhancing Sustainability in Industrial Workspaces: A Smart Approach to CO₂ Reduction and Environmental Footprint
On my mind, October 2026
Secure SoC architectures. Reusable datapaths. Better ways to connect hardware and software.
Current focusOpportunities & collaboration
Discuss a role, collaboration
or engineering challenge.
Connect with me about engineering roles, research collaboration, technical reviews and project support.
Let’s start a conversation