ABOUT / CONSTRUCTION RECORD
I design and define hardware.
I work at the architectural layer of silicon: specification definition, subsystem structure, interconnect and integration interfaces, and accelerator datapath organisation.
Professional position
I am Sundaram S S, a VLSI design and hardware architecture engineer based in Coimbatore, India, working as Deputy Head – Design Process at Zepto Logic Technologies Private Limited.
My public portfolio is intentionally narrower than my internal work. Current-employer programme names, architecture, collaborators, funding information, patent candidates and internal measurements are not published here.
Engineering education
B.E. Electrical & Electronics Engineering
Kumaraguru College of Technology, Coimbatore
CGPA 8.5Diploma · Electrical & Electronics Engineering
Kongu Polytechnic College, Perundurai
87%Hardware-first vocabulary
System and subsystem architecture definition · hardware specification authoring · design partitioning · architectural trade-off analysis · power/performance/area targeting.
Network-on-Chip architecture · AMBA AXI4 / AXI4-Lite / AXI-Stream · bus and interconnect topology · integration interfaces · ready/valid boundaries · CDC structure.
Modular arithmetic structures · transform engines · elliptic-curve arithmetic hardware · multiply-accumulate organisation · pipeline depth and resource sharing.
Hardware network security · root-of-trust concepts · post-quantum accelerator architecture · security-domain-bound execution · side-channel-resistant architecture as research direction.
Verilog RTL · UVM environment structure · Vivado · Cadence Genus synthesis · FPGA prototyping · resource and timing characterisation.
Three operating principles
Architecture before implementation.
A programme is cheapest to correct while its interfaces and contracts are still definitions.
Evidence before claim.
A capability statement is only as strong as the artifact that can defend it.
Reuse with explicit boundaries.
Shared resources are valuable when arbitration, ownership and verification remain visible.