About me

Sundaram S SEngineering.
And leadership.

I am a hardware architecture and VLSI engineer with responsibilities in technical leadership, engineering delivery and product planning. Based in Coimbatore, I work across system architecture, Verilog and SystemVerilog RTL, FPGA prototyping, AXI integration and hardware security. I lead design reviews, coordinate teams and milestones, and translate technical priorities into roadmaps and execution plans.

Architecture
to execution.
Sundaram S S
Sundaram S SEngineering & technical leadership
Engineer. Architect. Technical leader.
Current roleDeputy Head – Design ProcessEngineering foundationM.E. VLSI Design · PSG College of TechnologyBased inCoimbatore, IndiaExperience

Technical & engineering leadership

Architecture, people
and execution.

I combine technical judgement with responsibility for priorities, teams and delivery.

Technical direction

Define architecture and specifications, review design decisions, and guide priorities across RTL, verification and FPGA integration.

Teams, operations & execution

Coordinate engineers and day-to-day engineering activity, mentor trainees, track milestones and actions, and follow technical issues through implementation and validation.

Strategy & product planning

Develop technology roadmaps, assess feasibility and reuse opportunities, and shape IP maturity, positioning and commercialisation plans.

Experience

Professional
experience.

Jul 2026 – Present

Deputy Head – Design Process

Zepto Logic Technologies Pvt. Ltd.

I lead design-process planning and coordinate technical execution across engineering work. My responsibilities include architecture and design reviews, technology roadmaps, milestone tracking, team guidance, feasibility assessment, and IP/product planning.

7 Apr – 31 Dec 2025

Engineering Intern

Aviat Networks

On-campus internship on VLAN Switching on Zynq UltraScale+ SoC, with AMD Kria KR260 platform context.

Education

From electrical systems
to digital silicon.

2024–2026

M.E. VLSI Design

PSG College of Technology, Coimbatore

CGPA 8.2
2021–2024

B.E. Electrical & Electronics Engineering

Kumaraguru College of Technology, Coimbatore

CGPA 8.5
2017–2020

Diploma in Electrical & Electronics Engineering

Kongu Polytechnic College, Perundurai

87%

Professional capabilities

Technical & professional capabilities.

Architecture, implementation, verification, security, leadership and technology planning.

Architecture & integration

Turning requirements into subsystem boundaries, interface contracts, datapaths, and practical design trade-offs.

  • System & subsystem architecture
  • Hardware specifications
  • AXI4 / AXI4-Lite / AXI-Stream
  • PS–PL integration
  • Pipelining & resource sharing

RTL & FPGA development

Describing hardware, building reusable blocks, and connecting designs to real FPGA platforms.

  • Verilog
  • SystemVerilog
  • Vivado / Vitis
  • Zynq-7000
  • Kria KR260
  • FPGA prototyping

Verification & evaluation

Connecting intended behaviour to observable results through structured simulation and implementation analysis.

  • Testbench development
  • UVM environment structure
  • Protocol checking
  • Timing & resource analysis
  • Hardware traffic validation

Security & research

Exploring how architecture can make networked and embedded systems more trustworthy.

  • Hardware network security
  • Ethernet packet processing
  • Streaming entropy monitoring
  • Cryptographic accelerator architecture
  • Hardware security research

Engineering leadership & delivery

Coordinating people, technical decisions and execution so engineering work progresses with clear priorities and accountability.

  • Design reviews
  • Team coordination & mentoring
  • Milestone & action tracking
  • Cross-functional execution

Technical strategy & product planning

Connecting engineering feasibility, reusable IP and product priorities to a practical technology roadmap.

  • Technology roadmaps
  • Feasibility & trade-off analysis
  • IP maturity assessment
  • Product positioning & commercialisation planning

Learning

Selected training

  • Maven Silicon — VLSI SoC Design (Verilog)
  • PSG College of Technology / Qualcomm — System-Level Verification Workshop
  • IIT Bombay — Spoken Tutorial

Recognition

Honours

  • Anna University TN-CEETA Postgraduate Merit Scholar — 88.275 percentile
  • PSG Achievers Award
  • Mahatma Gandhi Merit Scholar

Community

Professional memberships

  • VLSI Society of India — Tamil Nadu Chapter
  • International Association of Engineers (IAENG)

Opportunities & collaboration

Discuss a role, collaboration
or engineering challenge.

Connect with me about engineering roles, research collaboration, technical reviews and project support.

Let’s start a conversation
Connect

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